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NJU6350
SERIAL I/O REAL TIME CLOCK
s GENERAL DESCRIPTION
The NJU6350 is a serial I/O Real Time Clock suitable for 4 bits micro-processor. It contains quartz crystal oscillator, counter, shift register, voltage regulator, voltage detector, and interface controller. The NJU6350 required only 3-port of microprocessor for data transfer, and the microprocessor can receive the data at any time when the microprocessor requires. The operating voltage is as wide as 2.0V to 5.5V, consequently, the NJU6350 can count accurate time data even if the back up period. Furthermore, the long time back up is available as the current consumption during the back up period is less than 2A. NJU6350R NJU6350C
s PACKAGE OUTLINE
s FEATURES
q Operating Voltage : 3.0V 20% 2.0V to 5.5V ( The clock operation ) q Low operating current : 0.8 A ( Typ. ) at 2.0V 2.0 A ( Max. ) at 2.0V q BCD Counts of Seconds, Minutes, Hours, Days of Week, Date, Month and Year q q q q q Required only 3-port ( DATA, CLK and CE ) Low Battery Detector ( Low voltage alarm signal output ) Automatic Leap Year Compensation : Up to AD 2099 Package Outline C-MOS Technology : VSP 8 / Chip
s PIN CONFIGURATION
FOUT 1 XT XT 2 3
8 XDD 7 DATA 6 CLK 5 CE
VSS 4
NJU6350
s BLOCK DIAGRAM
Fout XT XT V SS V DD Low Voltage Detector Controller Oscillator Divider Timer Counter hour day date
sec.
min.
month
year
DATA
CLK CE
s TERMINAL DESCRIPTION
No. 1
SYMBOL Fout
I/O O
2 3 4 5
XT XT VSS CE
I O Power I
FUNCTION Oscillator output terminal. ON :It outputs oscillator signal , frequency 32.768kHz. OFF :It is in high impedance status. Quartz crystal connect terminal ( f = 32.768kHz ). GND Chip enable terminal ( With pull-down resistor ). " H " : Data input/output available " L " : Data terminal is in high impedance status. When the data input/output is executed consequently, the CE terminal should be set to " L " level at the data transmission interval. Clock terminal. The Data Input/Output is synchronized by this clock. When the CE terminal is "L", the data input is not available. When the CE signal which is raising edge or falling edge, the CLK signal should be fixed to " L ". Serial timer data input/output terminal. This terminal is switched to input or output by system control data. (Defult : input) When the CE terminal is set to " L ", the data terminal is high impedance. Power supply The rising time of VDD should be less than 10mS.
6
CLK
I
7
DATA
I/O
8
VDD
Power
NJU6350
s FUNCTIONAL DESCRIPTION
1. Timer and System control data format The NJU6350 adopts BCD code consisting of 4 bits per digit. The calendar function including the last date of each month and the leap year calculation is executed automatically. The system control data operates Data I/O mode set, Oscillator output set and Test mode set. The unused bit for the Timer and System control data is always set to " 0 ". < System control data format > System control data block C2 0 C1 0 C0 0 RW 1 MSB C2 C1 C0 LSB RW
Contents Writing the data of oscillator output / test mode set F = " 0 " : Oscilator output off (high impedance status) F = " 1 " : Oscilator output on T0 to 6:Test mode set ( Normaly all " 0 " ) MSB F T6 T5 T4 T3 T2 T1 Writing the data of " Year " Writing the data of " Month " Writing the data of " Date " Writing the data of " Days of Week " Writing the data of " Hour " Writing the data of " Minute " Writing the data of " Second " Reading the data of " Year " Reading the data of " Month " Reading the data of " Date " Reading the data of " Days of Week " Reading the data of " our " Reading the data of " Minute " Reading the data of " Second " nvalidity
LSB T0
0 0 0 1 1 1 1 0 0 0 1 1 1 1 0
0 1 1 0 0 1 1 0 1 1 0 0 1 1 0
1 0 1 0 1 0 1 1 0 1 0 1 0 1 0
1 1 1 1 1 1 1 0 0 0 0 0 0 0 0
< Timer data format > MSB Second 0 Minute Hour Days of Week Date Month Year 0 0 Y7 0 0
S6 m6 0
S5 m5 H5
S4 m4 H4
S3 m3 H3 DC
S2 m2 H2 W2 D2 M2 Y2
S1 m1 H1 W1 D1 M1 Y1
LSB S0 m0 H0 W0 D0 M0 Y0
Range 0 59 0 59 0 23 1 7
0 0 Y6
D5 0 Y5
D4 M4 Y4
D3 M3 Y3
1 31 1 12 0 99
Note1) The bit of " DC " in the " Days of Week " is a flag as the result of Low Voltage Detection. If the supply voltage is reduced to the detection voltage level, then the flag of " DC " is set to "1" at the read operation, and else the flag is always " 0 ". (Note2) Only the data of Sec.., ..,Year as data of Timer and Calendar must be written to the NJU6350 why any other data will be causes in malfunction of the timer counter.
NJU6350
2. Data writing operation Data writing performs to set the system control data block ( 4 bits ) and the mode set data ( Oscillator output control and Test mode set ) or the timer data block ( 8 bits, but only data of " Days of Week " is 4 bits ) to NJU6350. The CE terminal is set to " H ", and the data is written into the shift register in the NJU6350 from the DATA terminal synchronizing with the rising edge of the clock signal input from the CLK terminal. At first, System control data is written into NJU6350. The first 4 bits of them are effective. When the bit of " RW " in System control data is " 1 ", the mode goes to writing. In the writing mode, the update of the timer is stopped and the oscillator divider is cleared excepting for the Oscillation output set and Test mode set. At second, Timer data is written into NJU6350. The last 8 bits of them are effective. ( In case of Days of week, the last 4 bits are effective. ) The data order to write is LSB first. The oscillator divider starts the operation when the CE signal is changed from " H " or " L ". < Writing timer data > In case of November CE 1 CLK Input data DATA 1 RW 0 C0 1 C1 0 C2 1 M0 0 M1 0 0 1 M4 0 0 0 2 3 4 5 6 7 8 9 10 11 12
M2
M3
0
0
0
(Note3) In case of over than 12 bits data, valid data is the first 4 bits as System control data and the last 8 bits as Timer data. ( In case of Days of week, it is the last 4 bits is effective. ) 3. Data reading operation Data reading performs to send the Timer data ( 8 bits, but only data of " Days of Week " is 4 bits ) corresponding the system control data from NJU6350 after the system control data ( 4 bits ) is set to NJU6350. The CE terminal is set to " H ", and the System control data are written into the shift register in the NJU6350 from the DATA terminal synchronized with the rising edge of the clock signal input from the CLK terminal. At first, System control data is written into NJU6350. The first 4 bits of them are effective. When the bit of " RW " in System control data ( Except the " 0,0,0,0 " data. ) is " 0 " the mode goes to reading. When the falling edge of the clock signal is input from the CLK terminal just after the recognition of reading mode, the DATA terminal is changed from Input to Output. The first 8 bits of Read data is effective. ( In case of Days of week, the first 4 bits is effective. ) After the falling edge of the CE terminal, the DATA terminal is changed from Output to Input. The data order to read is LSB first. (Note4) In case of counting the timer up during the data reading. The difference between the read out data of timer and the actual timer data is sometimes occurred. ( The difference range depend on condition. ) In case of " 99.12.31.Sat.23:59:59 " at the current time, the update is operated immediately after year but " 99 " is read out, the data is the result of reading operation is " 99.1.1.Sun.0:0:0 " instead of the true data " 00.1.1.Sun.0:0:0 ".
NJU6350
< Reading timer data > In case of CE 1 Input data CLK DATA 0 RW 0 C0 1 C1 0 C2 1 M0 0 M1 0 M2 0 M3 1 M4 0 0 0 0 0 0 2 3 4 5 6 7 8 9 10 11 12 The DATA terminal is changed over from Output to Input
System control writing data
Timer reading data
The DATA terminal is changed over from Input to Output at the arrow. ( Note5 ) The first 8 bits of timer data are effective. (In case of Days of week, the first 4 bits are effective.) 4. Voltage Detect Function The NJU6350 incorporates the low battery detector. If the supply voltage reduce to the detection level, Detector check flag is " 1 " as warning code for the CPU. When power on reset or data writing operation, the Detector check flag is set " 0 ". The low battery detector operates one time per 1 second. 5. Data Access The NJU6350 can operate from 2.0V to 5.5V. However, the data access must operate in the range of 3V20%. 6. Crystal Oscillator Circuit The crystal oscillator circuit in the NJU6350 incorporates the capacitors. Therefore, it can operate with only external crystal for 32.768kHz. However, the external capacitors are required to get the matching between the incorporated oscillator and a external crystal in accordance with the characteristics of crystal.
Rf = 20M (TYP)
XT
Cg = 31pF (TYP)
32.768kHz XT Ro = 320k (TYP)
Cd = 18pF (TYP)
NJU6350
s ABSOLUTE MAXIMUM RATINGS
PARAMETER Supply Voltage Input Voltage Operating Temperature Storage Temperature Power Dissipation VSP SYMBOL VDD VI Topr Tstg PD RATING -0.3 to +6.0 VSS-0.3 to VDD+0.3 -30 to +80 -40 to +125 320 UNIT V V C C mW
Note1) Decoupling capacitor should be connected between VDD and VSS due to the stabilized operation of the circuit.
s ELECTRICAL CHARACTERISTICS
DC Characteristics
PARMETER Operating Voltage Detecting Voltage SYMBOL
( Unless Otherwise Specified
CONDITOINS
VDD=3V20%, VSS=0V, Ta=25C )
MIN. 2.0 1.3 1.6 0.8 0.8 -2.0 -1.0 VDDX0.8 VSS 0.4 1.0 1.0 mA TYP. MAX. 3.6 1.9 2.0 A 2.0 2.0 1.0 12.0 VDD VDDx0.2 A A A A V UNIT V V
VDD VDET IDD1
Oscillation Output off, XT=32.768kHz VDD=2.0V, CE=CLK=0V Oscillation Output off, XT=32.768kHz VDD=3.6V, CE=CLK=0V DATA Terminal ( CE=0V ) CLK Terminal CE Terminal ( VDD=CE=3.6V ) CLK, CE, DATA Terminals CLK, CE, DATA Terminals DATA Terminal ( VDD=2.4V, VOH=1.8V ) FOUT Terminal ( VDD=2.4V, VOH=1.8V ) DATA,FOUT Terminals ( VDD=2.4V, VOL=0.4V )
Operating Current
IDD2
3-state Leakage Current Input Leakage Current Input Current Input Voltage
Output Current
ITSL IIL IIN VIH VIL IOH1 IOH2 IOL
AC Characteristics PARAMETER CLK Pulse " H " Period CLK Pulse " L " Period CE Set-up Time Before CLK Rising CE Hold Time After CLK Falling DATA Set-up Time Before CLK Rising DATA Hold Time After CLK Rising DATA Delay Time CLK Falling Rise / Fall Time
( Unless Otherwise Specified SYMBOL tCWH tCWL tCS tCH tWDS tWDH tRDD tRF CONDITIONS
VDD=3V20%, VSS=0V, Ta=25C ) MIN. 0.47 0.47 470 20 100 20 TYP. MAX. 5000 5000 UNIT S S nS nS nS nS nS nS
VDD=2.4V CL=50pF
200 40
NJU6350
s TIMING CHART of Real Time Clock Block
CE CLK DATA (Write) 1 2 3 4 5 6 7 8
Timer data
9
10
11
12
System control data
DATA (Read)
1
2
3
4
5
6
7
8
9
10
11
12
System control data
Timer data
CE tCS
tCWH tCWL
tCH
CLK tWDS tWDH DATA
CE
CLK
tRDD
DATA
The DATA terminal is changed over from Input and Output.
NJU6350
s APPLICATION CIRCUIT
VCC VDD CE
CLK NJU6350 DATA CPU
VSS XT
FOUT XT
32.768kHz
MEMO
[CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights.

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